Labels:text | screenshot | font | number | document | line | parallel OCR: (a) 11 16 31 PowerPC 601 OPCD RT RA D 0 6 11 16 31 Alpha 21064 OPCD RT RA D PowerPC 601 Effective address= (RA) + D if RA=0 D if RA=0 Alpha 21064 Effective address= (RA) + D If RA#31 If RA-31 (b) 0 6 11 16 21 31 PowerPC 601 OPCD RT RA RB EO Rc PowerPC 601 Effective address= (RA) + (RB) if RA=0 D if RA=1 Alpha 21064 Register + register addressing is not available Figure 6: Memory instruction formal. (a) Load- and store-instruction format using register + displacement addressing. The displacement D is sign extended prior to addition. In Alpha, D is multiplied by 216 if OPCD = LDAH. RT is the destination register. (b) load- and store- instruction format using register + register (indexed) addressing. RT is the destination register.
